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Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS [electronic resource] / by Libin Yao, Michiel Steyaert, Willy Sansen.

By: Contributor(s): Material type: TextSeries: The International Series in Engineering and Computer Science, Analog Circuits and Signal Processing ; 868Publisher: Dordrecht : Springer Netherlands, 2006Description: XXIII, 158 p. online resourceContent type:
  • text
Media type:
  • computer
Carrier type:
  • online resource
ISBN:
  • 9781402041402
  • 99781402041402
Subject(s): Additional physical formats: Printed edition:: No titleDDC classification:
  • 621.3815 23
Online resources:
Contents:
ADCs in Nanometer CMOS Technologies -- Principle of ?-? ADC -- Low-Power Low-Voltage ?-? ADC Design in Nanometer CMOS: Circuit Level Approach -- Low-Power Low-Voltage ?-? ADC Design in Nanometer CMOS: System Level Approach -- Conclusions.
In: Springer eBooksSummary: Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS addresses the low-power low-voltage Sigma-Delta ADC design in nanometer CMOS technologies at both the circuit-level and the system level. The low-power low-voltage Sigma-Delta modulator design at the circuit level is introduced. A design example is presented in this book. This design is the first published Sigma-Delta design in a 90-nm CMOS technology and reaches a very high figure-of-merit. At the system level, a novel systematic study on the full feedforward Sigma-Delta topology is presented in this book. As a design example, a fourth-order single-loop full feedforward Sigma-Delta modulator design in a 130-nm pure digital CMOS technology is presented. This design is the first design using the full feedforward Sigma-Delta topology and reaches the highest conversion speed among all the 1-V Sigma-Delta modulators to date.
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ADCs in Nanometer CMOS Technologies -- Principle of ?-? ADC -- Low-Power Low-Voltage ?-? ADC Design in Nanometer CMOS: Circuit Level Approach -- Low-Power Low-Voltage ?-? ADC Design in Nanometer CMOS: System Level Approach -- Conclusions.

Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS addresses the low-power low-voltage Sigma-Delta ADC design in nanometer CMOS technologies at both the circuit-level and the system level. The low-power low-voltage Sigma-Delta modulator design at the circuit level is introduced. A design example is presented in this book. This design is the first published Sigma-Delta design in a 90-nm CMOS technology and reaches a very high figure-of-merit. At the system level, a novel systematic study on the full feedforward Sigma-Delta topology is presented in this book. As a design example, a fourth-order single-loop full feedforward Sigma-Delta modulator design in a 130-nm pure digital CMOS technology is presented. This design is the first design using the full feedforward Sigma-Delta topology and reaches the highest conversion speed among all the 1-V Sigma-Delta modulators to date.

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